ponius pazystu tik tikrus, su keturiom kojom ir kailiuku... :)
Todel kodel jis neveikia as nezinau. Zinau kad mano kiniskas programeris
irgi kartais pastrigaliodavo su kai kuriais cipais. Bet as
paprasciausiai tu blogu cipu nenaudodavau- nurasydavau kaip blogus, o
imdavau kurie veikia.
O siaip, kiek pats fiziskai programavau, po komandos "chip erase" visas
cipas pats issitrina- tik rodos tavo 25010 tokios komandos neturi.
Rasymui (ir trinimui) pirmiausiai ziureti ar WP koja teisingai stovi.
Rasymas ir trinimas isijungia, kai atlieki visas privalomas
manipuliacijas- uztenka maziausios klaideles ar neteisingo taimingo ir
rasymo komanda atsaukiama. Tuo tarpu skaitymas veikia paprasciau.
Gal neuzpyks del eterio tersimo, va gabalas mano naudoto source. Ten
kiek paprasciau parasyta kaip rasosi i STANDARTINE 25xx mikroschema.
Pasiskaityk bent jau komentarus- tai datasheetu ir kitu programu
analizes ir realaus eksperimento vaisius.
// ****************************************** //
// Serial flash interface based on MX25L1635, SST25VF016B, LE25U20AMB //
//
// (c)2013 by Savel. http://www.vabolis.lt //
//
// ****************************************** //
#ifndef spi_h
#include "spi.c"
#endif
/* status register bits */
#define SRWD 7 // 1=status register write disable (0=status write
enabled) (R/W)
#define BPL 7 // block protection bit. 1= all BPn are READ ONLY, 0=BPn
writable.
#define QE 6 // Quad output enabled=1 (Read Only in "normal chips")
#define AAI 6 // Auto Address Increment Programming status (1=AAI mode,
0=Byte program mode). Normal chips
#define BP3 5 // block protection level (R/W)
#define BP2 4 // block protection level (R/W)
#define BP1 3 // block protection level (R/W)
#define BP0 2 // block protection level (R/w)
#define WEL 1 // 1=write enabled latch (0=write disabled) (read only) -
connected to hardware WP pin. Hardware overwrites this value.
#define WIP 0 // 1=write in progress bit. 0-no writing (ready) (read only)
/* STANDARD COMMANDS */
/*
Command 1cycle 2 3 4 5 6 n-th
READ (max 25MHz) 0x03 A23-16 A15-8 A7-0
(max 80MHz)* 0x0B A23-16 A15-8 A7-0 dummy read read...
Small sector erase 0xD7 A23-16 A15-8 A7-0
0x20 same as above
(0x20 = sector size 4K)
(0x52 = sector size 32K)
(0xD8 = sector size 64K)
Sector erase 0xD8 A23-16 A15-8 A7-0
Chip erase 0xC7
0x60
Page program 0x02 A23-16 A15-8 A7-0 PD* PD* PD*
Byte program 0x02 A23-16 A15-8 A7-0 DATA (other chip)
Autoincremnt WRITE 0xAD A23-16 A15-8 A7-0 DATA0 DATA1 DATAn
Write enable 0x06
Write disable 0x04
Power down 0xB9
Status reg read 0x05
Status reg write 0x01 DATA
Read silicon JEDEC 0x9F
Read silicon ID2 0xAB dummy dummy dummy
Read silicon ID2 0x90 dummy dummy dummy read read read...
Wake Up 0xAB
EBSY use SO to show RY/BY status 0x70 in AAI programming.
DBSY disable EBSY 0x80
NOTE: In order for commands other than the read command be recognized,
/CS must rise after all the bus cycle input.
Before starting sector erase, chip erase, page program, status write,
the device must be placed in write enable state.
Operation is same as for setting status register WEN to "1", and the
state is enabled by inputing the write command.
Write enable command consists only of the one bus cycle and it is
initiated by 0x06 command.
Write enable is automatically disabled AFTER WRITE OPERATION.
*/
/* This procedure read the status register and returns the byte. */
unsigned char SROM_ReadStatus(void)
{
unsigned char a;
SS_LO;
SPI_MasterTransmit(0x05);
a=SPI_MasterTransmit(0);
SS_HI;
return a;
}
/* enable writing to status reg */
void SROM_EWSR(void)
{
SS_LO;
SPI_MasterTransmit(0x50); /* enable writing to the status register */
SS_HI;
}
/* Write to status reg */
void SROM_WRSR(unsigned char byte)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x01); /* select write to status register */
SPI_MasterTransmit(byte); /* data that will change the status of BPx */
SS_HI; /* disable the device */
}
/* Write enable */
void SROM_WREN(void)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x06); /* send WREN command */
SS_HI; /* disable device */
}
/* PROCEDURE: WRDI */
/* */
/* This procedure disables the Write Enable Latch. */
void SROM_WRDI(void)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x04); /* send WRDI command */
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Read_ID */
/* */
/* This procedure Reads the manufacturer's ID and device ID. It will */
/* use 90h or ABh as the command to read the ID (90h in this sample). */
/* It is up to the user to give the last byte ID_addr to determine */
/* whether the device outputs manufacturer's ID first, or device ID */
/* first. Please see the product datasheet for details. Returns ID in */
/* variable byte. */
/************************************************************************/
unsigned char SROM_Read_ID(unsigned char ID_addr)
{
unsigned char byte;
SS_LO; /* enable device */
SPI_MasterTransmit(0x90); /* send read ID command (90h or ABh) */
SPI_MasterTransmit(0x00); /* send address */
SPI_MasterTransmit(0x00); /* send address */
SPI_MasterTransmit(ID_addr); /* send address - either 00H or 01H */
byte = SPI_MasterTransmit(0); /* receive byte */
SS_HI; /* disable device */
return byte;
}
/************************************************************************/
/* PROCEDURE: Jedec_ID_Read */
/* */
/* This procedure Reads the manufacturer's ID (BFh), memory type (25h) */
/* and device ID (8Eh). It will use 9Fh as the JEDEC ID command. */
/* Please see the product datasheet for details. */
/* */
/* Returns: */
/* IDs_Read:ID1(Manufacture's ID = BFh, Memory Type (25h), */
/* and Device ID (8Eh) */
/* */
/************************************************************************/
unsigned long SROM_Jedec_ID_Read(void)
{
unsigned long temp=0;
SS_LO; /* enable device */
SPI_MasterTransmit(0x9F); /* send JEDEC ID command (9Fh) */
temp = (temp | SPI_MasterTransmit(0)) << 8; /* receive byte */
temp = (temp | SPI_MasterTransmit(0)) << 8;
temp = (temp | SPI_MasterTransmit(0)); /* temp value = 0xBF258E */
SS_HI; /* disable device */
return temp;
}
/************************************************************************/
/* PROCEDURE: Read */
/* */
/* This procedure reads one address of the device. It will return the */
/* byte read in variable byte. */
/* */
/* */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* */
/* */
/* Returns: */
/* byte */
/* */
/************************************************************************/
unsigned char SROM_Read(unsigned long Dst)
{
unsigned char byte = 0;
SS_LO; /* enable device */
SPI_MasterTransmit(0x03); /* read command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
byte = SPI_MasterTransmit(0);
SS_HI; /* disable device */
return byte; /* return one byte read */
}
/************************************************************************/
/* PROCEDURE: Read_Cont */
/* */
/* This procedure reads multiple addresses of the device and stores */
/* data into 128 byte buffer. Maximum byte that can be read is 128 bytes*/
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* no_bytes Number of bytes to read (max = 128) */
/* pointer to buffer to store data */
/* Returns: */
/* Nothing */
/* */
/************************************************************************/
void SROM_Read_Cont(unsigned long Dst, unsigned long no_bytes,unsigned
char *buffer)
{
unsigned long i = 0;
SS_LO; /* enable device */
SPI_MasterTransmit(0x03); /* read command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
for (i = 0; i < no_bytes; i++) /* read until no_bytes is reached */
{
buffer[i] = SPI_MasterTransmit(0); /* receive byte and store at
address 80H - FFH */
}
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: HighSpeed_Read */
/* */
/* This procedure reads one address of the device. It will return the */
/* byte read in variable byte. */
/* */
/* */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* */
/* */
/* Returns: */
/* byte */
/* */
/************************************************************************/
unsigned char SROM_HighSpeed_Read(unsigned long Dst)
{
unsigned char byte = 0;
SS_LO; /* enable device */
SPI_MasterTransmit(0x0B); /* read command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SPI_MasterTransmit(0xFF); /*dummy byte*/
byte = SPI_MasterTransmit(0xFF);
SS_HI; /* disable device */
return byte; /* return one byte read */
}
/************************************************************************/
/* PROCEDURE: HighSpeed_Read_Cont */
/* */
/* This procedure reads multiple addresses of the device and stores */
/* data into 128 byte buffer. Maximum byte that can be read is 128 bytes*/
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* no_bytes Number of bytes to read (max = 128) */
/* */
/* Returns: */
/* Nothing */
/* */
/************************************************************************/
void SROM_HighSpeed_Read_Cont(unsigned long Dst, unsigned long no_bytes,
unsigned char *buffer)
{
unsigned long i = 0;
SS_LO; /* enable device */
SPI_MasterTransmit(0x0B); /* read command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SPI_MasterTransmit(0xFF); /*dummy byte*/
for (i = 0; i < no_bytes; i++) /* read until no_bytes is reached */
{
buffer[i] = SPI_MasterTransmit(0xFF); /* receive byte and store at
address 80H - FFH */
}
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Byte_Program */
/* */
/* This procedure programs one address of the device. */
/* Assumption: Address being programmed is already erased and is NOT */
/* block protected. */
/* */
/* */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* byte: byte to be programmed */
/* */
/* */
/* Returns: */
/* Nothing */
/* */
/************************************************************************/
void SROM_Byte_Program(unsigned long Dst, unsigned char byte)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x02); /* send Byte Program command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SPI_MasterTransmit(byte); /* send byte to be programmed */
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Auto_Add_IncA */
/* */
/* This procedure programs consecutive addresses of 2 bytes of data into*/
/* the device: 1st data byte will be programmed into the initial */
/* address [A23-A1] and with A0 = 0. The 2nd data byte will be be */
/* programmed into initial address [A23-A1] and with A0 = 1. This */
/* is used to to start the AAI process. It should be followed by */
/* Auto_Add_IncB. */
/* Assumption: Address being programmed is already erased and is NOT */
/* block protected. */
/* */
/* */
/* Note: Only RDSR command can be executed once in AAI mode with SO */
/* disable to output RY/BY# status. Use WRDI to exit AAI mode */
/* unless AAI is programming the last address or last address of */
/* unprotected block, which automatically exits AAI mode. */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* byte1: 1st byte to be programmed */
/* byte1: 2nd byte to be programmed */
/* */
/* Returns: */
/* Nothing */
/* */
/************************************************************************/
void SROM_Auto_Add_IncA(unsigned long Dst, unsigned char byte1, unsigned
char byte2)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0xAD); /* send AAI command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SPI_MasterTransmit(byte1); /* send 1st byte to be programmed */
SPI_MasterTransmit(byte2); /* send 2nd byte to be programmed */
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Auto_Add_IncB */
/* */
/* This procedure programs consecutive addresses of 2 bytes of data into*/
/* the device: 1st data byte will be programmed into the initial */
/* address [A23-A1] and with A0 = 0. The 2nd data byte will be be */
/* programmed into initial address [A23-A1] and with A0 = 1. This */
/* is used after Auto_Address_IncA. */
/* Assumption: Address being programmed is already erased and is NOT */
/* block protected. */
/* */
/* Note: Only WRDI and AAI command can be executed once in AAI mode */
/* with SO enabled as RY/BY# status. When the device is busy */
/* asserting CE# will output the status of RY/BY# on SO. Use WRDI */
/* to exit AAI mode unless AAI is programming the last address or */
/* last address of unprotected block, which automatically exits */
/* AAI mode. */
/* */
/* Input: */
/* */
/* byte1: 1st byte to be programmed */
/* byte2: 2nd byte to be programmed */
/* */
/* */
/* Returns: */
/* Nothing */
/* */
/************************************************************************/
void SROM_Auto_Add_IncB(unsigned char byte1, unsigned char byte2)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0xAD); /* send AAI command */
SPI_MasterTransmit(byte1); /* send 1st byte to be programmed */
SPI_MasterTransmit(byte2); /* send 2nd byte to be programmed */
SS_HI; /* disable device */
}
/* ******************************************* */
/* SLEEP, deep power down */
void SROM_DP(void)
{
SS_LO;
SPI_MasterTransmit(0xB9);
SS_HI;
}
/* WAKEUP, release from power down */
void SROM_RDP(void)
{
SS_LO;
SPI_MasterTransmit(0xAB);
SS_HI;
}
/************************************************************************/
/* PROCEDURE: Chip_Erase */
/* */
/* This procedure erases the entire Chip. */
/* */
/* Input: */
/* None */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_Chip_Erase(void)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x60); /* send Chip Erase command (60h or C7h) */
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Sector_Erase */
/* */
/* This procedure Sector Erases the Chip. */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_Sector_Erase(unsigned long Dst)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x20); /* send Sector Erase command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Block_Erase_32K */
/* */
/* This procedure Block Erases 32 KByte of the Chip. */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_Block_Erase_32K(unsigned long Dst)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0x52); /* send 32 KByte Block Erase command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Block_Erase_64K */
/* */
/* This procedure Block Erases 64 KByte of the Chip. */
/* */
/* Input: */
/* Dst: Destination Address 000000H - 0FFFFFH */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_Block_Erase_64K(unsigned long Dst)
{
SS_LO; /* enable device */
SPI_MasterTransmit(0xD8); /* send 64KByte Block Erase command */
SPI_MasterTransmit(((Dst & 0xFFFFFF) >> 16)); /* send 3 address bytes */
SPI_MasterTransmit(((Dst & 0xFFFF) >> 8));
SPI_MasterTransmit(Dst & 0xFF);
SS_HI; /* disable device */
}
/************************************************************************/
/* PROCEDURE: Wait_Busy */
/* */
/* This procedure waits until device is no longer busy (can be used by */
/* Byte-Program, Sector-Erase, Block-Erase, Chip-Erase). */
/* */
/* Input: */
/* None */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_Wait_Busy(void)
{
while ((SROM_ReadStatus() & 0x03) == 0x03) /* waste time until not busy */
SROM_ReadStatus();
}
/************************************************************************/
/* PROCEDURE: Wait_Busy_AAI */
/* */
/* This procedure waits until device is no longer busy for AAI mode. */
/* */
/* Input: */
/* None */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_Wait_Busy_AAI(void)
{
while ((SROM_ReadStatus() & 0x43) == 0x43) /* waste time until not busy */
SROM_ReadStatus();
}
/************************************************************************/
/* PROCEDURE: WREN_Check */
/* */
/* This procedure checks to see if WEL bit set before program/erase. */
/* */
/* Input: */
/* None */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_WREN_Check(void)
{
unsigned char byte;
byte = SROM_ReadStatus(); /* read the status register */
if (byte != 0x02) /* verify that WEL bit is set */
{
while(1)
/* add source code or statements for this file */
/* to compile */
/* i.e. option: insert a display to view error on LED? */
SS_HI;
}
}
/************************************************************************/
/* PROCEDURE: WREN_AAI_Check */
/* */
/* This procedure checks for AAI and WEL bit once in AAI mode. */
/* */
/* Input: */
/* None */
/* */
/* Returns: */
/* Nothing */
/************************************************************************/
void SROM_WREN_AAI_Check(void)
{
unsigned char byte;
byte = SROM_ReadStatus(); /* read the status register */
if (byte != 0x42) /* verify that AAI and WEL bit is set */
{
while(1)
/* add source code or statements for this file */
/* to compile */
/* i.e. option: insert a display to view error on LED? */
SS_HI;
}
}
On 2013.06.19 15:17, AMB wrote:
> radau eeproma 25010, prisilitavau , dabar icprog neskaito, o ponyprog
> skaito, bet neleidzia irasyti. nesuprantu gal kokia irasymo apsauga ideta,
> nes pdf'e raso kad yra toks dalykas kaip write protect, bet ponyje nerandu
> tokios funkcijos kad nuimti ta apsauga. gal kas zinot?
>
> "Levas" <aaaa@dddddddd.com> wrote in message
> news:kprs36$o6c$1@trimpas.omnitel.net...
>> tinka. Kiek bandziau.
>>
>> "AMB" <jkhkj@jkukjkkhkkg.lt> wrote in message
>> news:kprkik$ebs$1@trimpas.omnitel.net...
>>> is laptopo motinines cia , tai 3.3V turi uztekti. bandysiu gal tada pats
>>> ant stacionariu kompu motinu paieskoti, nes motininiu turiu kruvom. O
>>> tiksliaizinai, kad tiktu didesnes talpos?
>>>
>>>
>>>
>>>
>>>
>>> "Levas" <kazkur@pasbobute.com> wrote in message
>>> news:kprk1n$dli$1@trimpas.omnitel.net...
>>>> va pirma pasitaikiusi is stacionaraus kompo motinos: 25L4005AM
>>>>
>>>> talpa "biski" per didele tau 4Mbit vs 1k :)
>>>>
>>>> kiek uzmeciau aki, rodos komandos sutampa. Vadinasi suderinamos.
>>>>
>>>>
>>>> On 2013.06.19 09:40, Levas wrote:
>>>>> neatsakiai, ar BUTINA 5V. Mazavolciu galeciau kelias duoti, tiesa
>>>>> didesnes... stipriai.
>>>>>
>>>>> Dar ant video ploksciu buna tipo 25xx512. Aisku korpusai SO. Jei reikia
>>>>> DIP, tai jau sunkiau.
>>>>>
>>>>>
>>>>>
>>>>> On 2013.06.19 09:36, AMB wrote:
>>>>>> su ponyprog nenuskaito, su willem nenuskaito, su ic-prog stabiliai
>>>>>> nuskaito,
>>>>>> bet neiraso. Itariu kazka negero. Be to jau nuo daug bandymu nulauziau
>>>>>> viena
>>>>>> kojele, bet vargais negalais prisijungiu dar :) butu gerai pabandyti
>>>>>> kita.
>>>>>> gal zinai kokiame routeryje ar kokiose laptopuose?
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> "Levas" <kazkur@pasbobute.com> wrote in message
>>>>>> news:kprj8t$cgd$1@trimpas.omnitel.net...
>>>>>>> Jau susvilinai? :)
>>>>>>>
>>>>>>> Siaip, saltinis yra motinines ir visokie ruteriai. Galima deti is
>>>>>>> didesnes, ir kito modelio ir t.t. Tik vienas momentas- jei tikrai
>>>>>>> reikia
>>>>>>> 5V, tai pypec. Nera "aukstavolciu" niekur.
>>>>>>>
>>>>>>> On 2013.06.19 09:21, AMB wrote:
>>>>>>>> gakl kas zino kur Kaune galetu nusipirkti toki eeproma 25010?
>>>>>>>>
>>>>>>>> "AMB" <jkhkj@jkukjkkhkkg.lt> wrote in message
>>>>>>>> news:kpccoi$o0d$1@trimpas.omnitel.net...
>>>>>>>>> Senas geras ponyprog, nesitikejau kad palaiko, ziuriu tikrai yra
>>>>>>>>> 25010.
>>>>>>>>> Bandysiu.
>>>>>>>>> Aciu uz patarima.
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> "Vitoldas" <vitoldas@mail.lei.lt> wrote in message
>>>>>>>>> news:kpcad0$loc$1@trimpas.omnitel.net...
>>>>>>>>>> man rodos ponyprog palaiko.
>>>>>>>>>> bet velgi - reikia com/lpt porto.
>>>>>>>>>> (com dazniau siais laikais randamas negu LPT,
>>>>>>>>>> nors gal kas turi ir ponyprog HW su LPT. as savo laiku dariausi su
>>>>>>>>>> com)
>>>>>>>>>>
>>>>>>>>>> o siaip kokia beda gali buti norint uzprogramint standartini
>>>>>>>>>> SPI EEPROM? ziurek ar programatoriaus pasirinkimuose nera pvz.
>>>>>>>>>> kazko panasaus i 25010 ir pirmyn.
>>>>>>>>>>
>>>>>>>>>> On 2013.06.13 12:59, AMB wrote:
>>>>>>>>>>> ar galima su kokia nemokama programa/schema uzprograminti
>>>>>>>>>>> PM25LV010 arba M25P10 ?
>>>>>>>>>>> Dar turiu willem programeri, bet raso kad palaiko tik nauji
>>>>>>>>>>> wilemo
>>>>>>>>>>> hardwarai, mano versija senesne.
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>
>>>>>>> --
>>>>>>> Bye, Levas
>>>>>>>
>>>>>>> --
>>>>>>> http://www.vabolis.lt
>>>>>>
>>>>>>
>>>>>
>>>>
>>>> --
>>>> Bye, Levas
>>>>
>>>> --
>>>> http://www.vabolis.lt
>>>
>>>
>>
>>
>
>
--
Bye, Levas
--
http://www.vabolis.lt